There are a number of conventional processes for packaging integrated circuits. Many packaging techniques position solder bumps onto associated bond pads formed on an active face of a die to provide electrical interconnects to external devices. The die is then typically attached to a suitable substrate, such as a printed circuit board (PCB), such that the solder bumps on the die are surface mounted to contact pads on the substrate. The solder bumps are then typically reflowed to form solder joint connections between the substrate and the attached die.
Various problems, such as electromigration failure, can occur when a solder bump is electrically connected to the bond pad of an integrated circuit die. If a portion of the solder bump maintains a very high current density for a prolonged period, localized heating and void nucleation may erode the stability and performance of the electrical connection.
FIG. 1A illustrates an example of this problem. FIG. 1A shows a side, cross-sectional view of conventional integrated circuit die 114 having wiring layer 116, underbump metallization (UBM) layer 104 and bond pad 108, which supports solder bump 102. In this example, electron flow 112, which represents a large fraction of the total current flowing through the solder bump, moves horizontally through wiring layer 116 and begins to move upward at the perimeter of solder bump 102.
Electron flow 112 tends to follow the least resistive path, which narrows to one small region along the perimeter of solder bump 102. This is also shown in FIG. 1B, which illustrates a top view of some of the structures in FIG. 1A, including solder bump 102 and wiring layer 116. Electron flow 112 concentrates at region 118 as it begins its ascent into solder bump 102, because region 118 constitutes the most direct path into the solder bump. Thus, the current density is many times higher at region 118 in comparison to other points on the perimeter of solder bump 102, producing heat and causing the metal ions of the solder to move in the direction of the electron flow 112. The subsequent breakdown of the solder degrades the electrical connection enabled by solder bump 102, eventually reducing the performance and reliability of a device containing the above structures.
Although existing approaches work well in many situations, there are ongoing efforts to further improve the design of integrated circuit devices, such that problems like those described above are minimized or eliminated.